Hitachi H8S/2678 Series Reference Manual page 521

TSR3—Timer Status Register 3
Bit
—
Initial value
Read/Write —
Overflow Flag
Note: * Can only be written with 0, to clear the flag.
504
7 6
—
1 1
—
Input Capture/Output Compare Flag C
0 [Clearing conditions]
• When DTC is activated by TGIC interrupt and DISEL bit in DTC's MRB register is 0
• When 0 is written to TGFC after reading TGFC = 1
1 [Setting conditions]
• When TCNT = TGRC while TGRC is functioning as output compare register
• When TCNT value is transferred to TGRC by input capture signal while TGRC is
functioning as input capture register
Input Capture/Output Compare Flag D
0 [Clearing conditions]
• When DTC is activated by TGID interrupt and DISEL bit in DTC's MRB register is 0
• When 0 is written to TGFD after reading TGFD = 1
1 [Setting conditions]
• When TCNT = TGRD while TGRD is functioning as output compare register
• When TCNT value is transferred to TGRD by input capture signal while TGRD is
functioning as input capture register
0 [Clearing condition]
When 0 is written to TCFV after reading TCFV = 1
1 [Setting condition]
When the TCNT value overflows (from H'FFFF to H'0000)
5 4
— TCFV TGFD
0 0
— R/(W)* R/(W)*
Input Capture/Output Compare Flag A
[Clearing conditions]
0
• When DTC is activated by TGIA interrupt and DISEL
bit in DTC's MRB register is 0
• When DMAC is activated by TGIA interrupt and DTA
bit in DMAC's DMABCR register is 1
• When 0 is written to TGFA after reading TGFA = 1
1 [Setting conditions]
• When TCNT = TGRA while TGRA is functioning as
output compare register
• When TCNT value is transferred to TGRA by input
capture signal while TGRA is functioning as input
capture register
Input Capture/Output Compare Flag B
[Clearing conditions]
0
• When DTC is activated by TGIB interrupt and DISEL
bit in DTC's MRB register is 0
• When 0 is written to TGFB after reading TGFB = 1
1 [Setting conditions]
• When TCNT = TGRB while TGRB is functioning as
output compare register
• When TCNT value is transferred to TGRB by input
capture signal while TGRB is functioning as input
capture register
H'FE85
3 2
TGFC TGFB
0 0
R/(W)* R/(W)*
TPU3
1 0
TGFA
0 0
R/(W)*