Hitachi H8S/2678 Series Reference Manual page 630

TIOR0H—Timer I/O Control Register 0H
Bit 7
IOB3
Initial value 0
Read/Write R/W
TGR0B I/O Control
0 0
1
Note: 1. When bits TPSC2 to TPSC0 in TCR1 are set to B'000 and ø/1 is used as
6
IOB2 IOB1
0
R/W R/W
TGR0A I/O Control
0 0
1 0 0
1 0
1
0 0 TGR0B Output disabled
is output
1 Initial output is
compare
0 output
register
1 0
1
1 0 0 Output disabled
1 Initial output is
1 output
1 0
1
0 0 0 TGR0B Capture input
is input source is
1
capture TIOCB0 pin
register
1 *
1 Capture input
* *
source is channel
1/count clock
the TCNT1 count clock, this setting is invalid and input capture does not
occur.
5 4
IOB0 IOA3
0 0
R/W R/W
0 0 TGR0A Output disabled
is output
1 Initial output is
compare
0 output
register
1 0
1
Output disabled
1 Initial output is
1 output
1 0
1
0 0 TGR0A Capture input
is input source is
1
capture TIOCA0 pin
register
1 *
* * Capture input
source is channel
1/count clock
0 output at compare match
1 output at compare match
Toggle output at compare match
0 output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at TCNT1 count-up/
count-down
H'FFD2
3 2
IOA2 IOA1
0 0
R/W R/W
0 output at compare match
1 output at compare match
Toggle output at compare match
0 output at compare match
1 output at compare match
Toggle output at compare match
Input capture at rising edge
Input capture at falling edge
Input capture at both edges
Input capture at TCNT1 count-up/
count-down
*1
*: Don't care
TPU0
1 0
IOA0
0 0
R/W
*: Don't care
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