Hitachi H8S/2678 Series Reference Manual page 503

16-bit single-chip microcomputer
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IPRA—Interrupt Priority Register A
IPRB—Interrupt Priority Register B
IPRC—Interrupt Priority Register C
IPRD—Interrupt Priority Register D
IPRE—Interrupt Priority Register E
IPRF—Interrupt Priority Register F
IPRG—Interrupt Priority Register G
IPRH—Interrupt Priority Register H
IPRI—Interrupt Priority Register I
IPRJ—Interrupt Priority Register J
IPRK—Interrupt Priority Register K
15
Bit
Initial value
Read/Write
Bit
Initial value
Read/Write
Interrupt Sources and IPR Settings
Register
Bits 14 to 12
IPRA
IRQ0
IPRB
IRQ4
IPRC
IRQ8
IPRD
IRQ12
IPRE
DTC
IPRF
—*
IPRG
TPU channel 2
IPRH
8-bit timer channel 0
IPRI
EXDMAC channel 1
IPRJ
SCI channel 1
IPRK
—*
Note: * Reserved bits. These bits are always read as H'7 and should also be written with H'7.
486
14
IPR14
IPR13
0
1
R/W
R/W
7
6
IPR6
IPR5
0
1
R/W
R/W
IRQ1
IRQ5
IRQ9
IRQ13
Interval timer
A/D converter
TPU channel 3
8-bit timer channel 1
EXDMAC channel 2
SCI channel 2
—*
13
12
IPR12
1
1
R/W
5
4
IPR4
1
1
R/W
Interrupt priority settings
Bits 10 to 8
IRQ2
IRQ6
IRQ10
IRQ14
—*
TPU channel 0
TPU channel 4
DMAC
EXDMAC channel 3
—*
—*
H'FE00
Interrupt Controller
H'FE02
Interrupt Controller
H'FE04
Interrupt Controller
H'FE06
Interrupt Controller
H'FE08
Interrupt Controller
H'FE0A
Interrupt Controller
H'FE0C
Interrupt Controller
H'FE0E
Interrupt Controller
H'FE10
Interrupt Controller
H'FE12
Interrupt Controller
H'FE14
Interrupt Controller
11
10
IPR10
0
1
R/W
3
2
IPR2
0
1
R/W
Bits 6 to 4
IRQ3
IRQ7
IRQ11
IRQ15
Refresh timer
TPU channel 1
TPU channel 5
EXDMAC channel 0
SCI channel 0
—*
—*
9
8
IPR9
IPR8
1
1
R/W
R/W
1
0
IPR1
IPR0
1
1
R/W
R/W
Bits 2 to 0

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