Hitachi H8S/2678 Series Reference Manual page 399

Clock Timing
Table 7.4 Clock Timing
Condition A*: V
CC
V
SS
specifications), T
Condition B: V
CC
V
SS
specifications), T
* In planning stage
Item
Clock cycle time
Clock pulse high width
Clock pulse low width
Clock rise time
Clock fall time
Reset oscillation stabilization
time (crystal)
Software standby oscillation
stabilization time (crystal)
External clock output delay
stabilization time
382
= 2.7 V to 3.6 V, AV
= AV = 0 V, ø = 2 MHz to 20 MHz, T
SS
= –40°C to +85°C (wide-range specifications)
a
= 3.0 V to 3.6 V, AV
= AV = 0 V, ø = 2 MHz to 33 MHz, T
SS
= –40°C to +85°C (wide-range specifications)
a
Symbol
t
cyc
t
CH
t
CL
t
Cr
t
Cf
t
OSC1
t
OSC2
t
DEXT
= 2.7 V to 3.6 V, V
CC
a
= 3.0 V to 3.6 V, V
CC
a
Condition A
Min Max Min
50 500 30.3
20 — 10
20 — 10
— 5 —
— 5 —
10 — 10
10 — 10
500 — 500
= 2.7 V to AV
ref CC
= –20°C to +75°C (regular
= 3.0 V to AV
ref CC
= –20°C to +75°C (regular
Condition B
Max Unit
500 ns
— ns
— ns
5 ns
5 ns
— ms
— ms
µs
—
,
,
Test
Conditions
Figure 7.2
Figure 7.2
Figure 7.3(1)
Figure 7.3(2)
Figure 7.3(1)