Hitachi H8S/2678 Series Reference Manual page 505

SSIER—Software Standby Release IRQ Enable Register
15
Bit
SSI15
Initial value
R/W
Read/Write
Bit
SSI7
Initial value
R/W
Read/Write
488
14
SSI14 SSI13
0 0
R/W R/W
7 6
SSI6 SSI5
0 0
R/W R/W
Software Standby Release IRQ Setting
SSIn
0
1
13 12
SSI12 SSI11
0 0
R/W R/W
5 4
SSI4 SSI3
0 0
R/W R/W
IRQn requests are not sampled in the software
standby state
When an IRQn request occurs in the software
standby state, the chip recovers from the software
standby state after the elapse of the oscillation
settling time
H'FE18 Interrupt Controller
11 10
SSI10 SSI9
0 0
R/W R/W
3 2
SSI2 SSI1
0 0
R/W R/W
Description
9 8
SSI8
0 0
R/W
1 0
SSI0
0 0
R/W
(n = 15 to 0)