Hitachi H8S/2678 Series Reference Manual page 465

Module Register
DMAC DMA write enable register
channels 0 DMA terminal control register
and 1
DMA control register 0A
DMA control register 0B
DMA control register 1A
DMA control register 1B
DMA band control register
Module stop control register
DTC DTC mode register A
DTC mode register B
DTC source address register
DTC destination address register
DTC transfer count register A
DTC transfer count register B
DTC enable register
DTC vector register
Module stop control register
EXDMAC EXDMA source address register 0
channel 0
EXDMA destination address
register 0
EXDMA transfer count register 0
EXDMA mode control register 0
EXDMA address control register 0
EXDMAC EXDMA source address register 1
channel 1
EXDMA destination address
register 1
EXDMA transfer count register 1
EXDMA mode control register 1
EXDMA address control register 1
448
Abbreviation R/W
DMAWER R/W
DMATCR R/W
DMACR0A R/W
DMACR0B R/W
DMACR1A R/W
DMACR1B R/W
DMABCR R/W
MSTPCR R/W
3
MRA —*
3
MRB —*
3
SAR —*
3
DAR —*
3
CRA —*
3
CRB —*
DTCER R/W
DTVECR R/W
MSTPCR R/W
EDSAR0 R/W
EDDAR0 R/W
EDTCR0 R/W
EDMDR0 R/W*
EDACR0 R/W
EDSAR1 R/W
EDDAR1 R/W
EDTCR1 R/W
EDMDR1 R/W*
EDACR1 R/W
Initial Value Address*
H'00 H'FF20
H'00 H'FF21
H'00 H'FF22
H'00 H'FF23
H'00 H'FF24
H'00 H'FF25
H'0000 H'FF26
H'0FFF H'FF40
Undefined —*
Undefined —*
Undefined —*
Undefined —*
Undefined —*
Undefined —*
H'00 H'FF28 to
H'FF2F
H'00 H'FF30
H'0FFF H'FF40
Undefined H'FDC0
Undefined H'FDC4
Undefined H'FDC8
5
H'0000 H'FDCC
H'0000 H'FDCE
Undefined H'FDD0
Undefined H'FDD4
Undefined H'FDD8
5
H'0000 H'FDDC
H'0000 H'FDDE
1
4
4
4
4
4
4