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WTCRB
Bit
15
—
Initial value
0
Read/Write
R
Bit
7
—
Initial value
0
Read/Write
R
Bits 15, 11, 7, and 3—Reserved: These bits are always read as 0 and cannot be modified.
Bits 14 to 12, 10 to 8, 6 to 4, 2 to 0—Wait Control (Wn2, Wn1, Wn0): These bits select the
number of program wait states for areas designated as 3-state access space in ASTCR.
Wn2
Wn1
0
0
1
1
0
1
4.2.4
Read Strobe Timing Control Register (RDNCR)
Bit
7
RDN7
Initial value
0
Read/Write
R/W
RDNCR is an 8-bit readable/writable register that selects the read strobe (RD) negation timing
when an area is designated as basic bus interface space.
14
13
W32
W31
1
1
R/W
R/W
6
5
W12
W11
1
1
R/W
R/W
Wn0
Description
0
Program wait not inserted in area n external access
1
1 program wait state inserted in area n external access
0
2 program wait states inserted in area n external access
1
3 program wait states inserted in area n external access
0
4 program wait states inserted in area n external access
1
5 program wait states inserted in area n external access
0
6 program wait states inserted in area n external access
1
7 program wait states inserted in area n external access
6
5
RDN6
RDN5
0
0
R/W
R/W
12
11
W30
—
1
0
R/W
R
4
3
W10
—
1
0
R/W
R
4
3
RDN4
RDN3
0
0
R/W
R/W
10
9
W22
W21
1
1
R/W
R/W
2
1
W02
W01
1
1
R/W
R/W
(n = 7 to 0)
2
1
RDN2
RDN1
0
0
R/W
R/W
8
W20
1
R/W
0
W00
1
R/W
0
RDN0
0
R/W
99
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