Hitachi H8S/2678 Series Reference Manual page 354

16-bit single-chip microcomputer
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*
PGn
WDDRG: Write to PGDDR
WDRG:
Write to PGDR
WPFCR0: Write to PFCR0
RPORG:
Read port G
RDRG:
Read PGDR
RPFCR0: Read PFCR0
n = 1 to 3
Note: * Output enable signal
Figure 5.59 Port G Block Diagram (b) (Pins PG1 to PG3)
Modes
1, 2, 4, 5, 6
Mode 7
Reset
R
Q
D
PG0DDR
C
WDDRG
Set
S
Q
D
PFCR0
CSnE
C
WPFCR0
RPFCR0
Reset
R
Q
D
PGnDR
C
WDRG
System controller
EXPE
Bus controller
CS
CS
RDRG
RPORG
337

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