Hitachi H8S/2678 Series Reference Manual page 558

Short address mode
Bit 7
DTSZ
DMACR
0
Initial value
R/W
Read/Write
Data Transfer Size
0 Byte-size transfer
1 Word-size transfer
Data Transfer Increment/
Decrement
0 MAR is incremented
after a data transfer
1 MAR is decremented
after a data transfer
Repeat Enable
0
1
Data Transfer Direction
6
DTID RPE
0
R/W R/W
Sequential mode
Repeat mode or idle mode
0 Dual address mode: Transfer with MAR as source address and IOAR as destination address
Single address mode: Transfer with MAR as source address and DACK pin as write strobe
1 Dual address mode: Transfer with IOAR as source address and MAR as destination address
Single address mode: Transfer with DACK as read strobe and MAR as destination address
5 4
DTDIR DTF3
0 0
R/W R/W
Data Transfer Factor
0 0 0 0
1
1 0
1
1 0 0
1
1 0
1
1 0 0 0
1
1 0
1
1 0 0
1
1 0
1
3 2
DTF2 DTF1
0 0
R/W R/W
Channel A
—
Activated by A/D converter conversion
end interrupt
Activated by DREQ pin
—
falling edge input
Activated by DREQ pin
—
low-level input
Activated by SCI channel 0 transmission
complete interrupt
Activated by SCI channel 0 reception
complete interrupt
Activated by SCI channel 1 transmission
complete interrupt
Activated by SCI channel 1 reception
complete interrupt
Activated by TPU channel 0 compare match/
input capture A interrupt
Activated by TPU channel 1 compare match/
input capture A interrupt
Activated by TPU channel 2 compare match/
input capture A interrupt
Activated by TPU channel 3 compare match/
input capture A interrupt
Activated by TPU channel 4 compare match/
input capture A interrupt
Activated by TPU channel 5 compare match/
input capture A interrupt
—
—
1 0
DTF0
0 0
R/W
Channel B
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