Hitachi H8S/2678 Series Reference Manual page 565

INTCR—Interrupt Control Register
Bit
—
Initial value
—
Read/Write
Interrupt Control Mode 1 and 0
INTM2
0
1
IER—IRQ Enable Register
15
Bit
IRQ15E
Initial value
Read/Write R/W
Bit
IRQ7E
Initial value
R/W
Read/Write
548
7 6
— INTM1
0 0
— R/W
Interrupt Control
INTM1
Mode
0 0
1 —
0 2
1 —
14
IRQ14E IRQ13E
0 0
R/W R/W
7 6
IRQ6E IRQ5E
0 0
R/W R/W
5 4
INTM0 NMIEG
0 0
R/W R/W
NMI Edge Select
0 Interrupt request generated at falling edge
of NMI input
1 Interrupt request generated at rising edge
of NMI input
Interrupts are controlled by I bit
Setting prohibited
Interrupts are controlled by bits I2 to I0, and IPR
Setting prohibited
13 12
IRQ12E IRQ11E
0 0
R/W R/W
5 4
IRQ4E IRQ3E
0 0
R/W R/W
IRQ15 to IRQ0 Enable
0 IRQn interrupts disabled
1 IRQn interrupts enabled
H'FF31 Interrupt Controller
3 2
—
0 0
—
Description
H'FF32 Interrupt Controller
11 10
IRQ10E IRQ9E
0 0
R/W
3 2
IRQ2E IRQ1E
0 0
R/W
(n = 15 to 0)
1 0
— —
0 0
— —
9 8
IRQ8E
0 0
R/W R/W
1 0
IRQ0E
0 0
R/W R/W