Hitachi H8S/2678 Series Reference Manual page 450

16-bit single-chip microcomputer
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Item
Erasing
Wait time after
SWE bit setting*
Wait time after
ESU bit setting*
Wait time after
E bit setting*
Wait time after
E bit clearing*
Wait time after
ESU bit clearing*
Wait time after
EV bit setting*
Wait time after
H'FF dummy
write*
Wait time after
EV bit clearing*
Wait time after
SWE bit clearing*
Maximum number
of erases*
Notes: 1. Follow the program/erase algorithms when making the time settings.
3. Programming time per 128 bytes. (Indicates the total time during which the P bit is set
in flash memory control register 1 (FLMCR1). Does not include the program-verify time.)
3. Time to erase one block. (Indicates the time during which the E bit is set in FLMCR1.
Does not include the erase-verify time.)
4. Maximum programming time
(max) = Σ wait time after P bit setting (z)
t
P
5. The maximum number of writes (N) should be set as shown below according to the
actual set value of (z) so as not to exceed the maximum programming time (t
The wait time after P bit setting (z) should be changed as follows according to the
number of writes (n).
Number of writes (n)
1 ≤ n ≤ 6
7 ≤ n ≤ 1000
(Additional programming)
Number of writes (n)
1 ≤ n ≤ 6
6. For the maximum erase time (t
wait time after E bit setting (z) and the maximum number of erases (N):
(max) = Wait time after E bit setting (z) × maximum number of erases (N)
t
E
Symbol
x
1
y
1
z
1,
6
*
α
1
β
1
γ
1
ε
1
η
1
θ
1
N
1,
6
*
N
i=1
z = 30 µs
z = 200 µs
z = 10 µs
Min
Typ
1
100
10
10
20
2
4
100
(max)), the following relationship applies between the
E
Max
Unit
µs
µs
µs
10
µs
µs
µs
µs
µs
µs
100
Times
Test
Conditions
Erase time
wait
(max)).
P
433

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