Hitachi H8S/2678 Series Reference Manual page 600

SCR1—Serial Control Register 1
Bit 7
TIE
Initial value 0
Read/Write R/W
Transmit Interrupt Enable
0 Transmit-data-empty interrupt (TXI) request disabled
1 Transmit-data-empty interrupt (TXI) request enabled
6
RIE TE
0
R/W R/W
Multiprocessor Interrupt Enable
Receive Enable
0 Reception disabled
1 Reception enabled
Transmit Enable
0 Transmission disabled
1 Transmission enabled
Receive Interrupt Enable
0 Receive-data-full interrupt (RXI) request and receive-error interrupt (ERI) request disabled
1 Receive-data-full interrupt (RXI) request and receive-error interrupt (ERI) request enabled
H'FF82
5 4
RE MPIE
0 0
R/W R/W
Clock Enable
0 0 Asynchronous
mode
Synchronous
mode
1 Asynchronous
mode
Synchronous
mode
0 Asynchronous
1
mode
Synchronous
mode
1 Asynchronous
mode
Synchronous
mode
Notes: 1. Outputs a clock of the same frequency as the bit rate.
2. Inputs a clock with a frequency 16 times the bit rate.
Transmit-End Interrupt Enable
0 Transmit-end interrupt (TEI) request disabled
1 Transmit-end interrupt (TEI) request enabled
0 Multiprocessor interrupts disabled
[Clearing conditions]
• When the MPIE bit is cleared to 0
• When data with MPB = 1 is received
1 Multiprocessor interrupts enabled
Receive interrupt (RXI) requests, receive-error interrupt (ERI)
requests, and setting of the RDRF, FER, and ORER flags in SSR are
disabled until data with the multiprocessor bit set to 1 is received
3 2
TEIE CKE1
0 0
R/W R/W
Internal clock/SCK pin functions as
I/O port
Internal clock/SCK pin functions as
serial clock output
Internal clock/SCK pin functions as
*1
clock output
Internal clock/SCK pin functions as
serial clock output
External clock/SCK pin functions as
*2
clock input
External clock/SCK pin functions as
serial clock input
External clock/SCK pin functions as
*2
clock input
External clock/SCK pin functions as
serial clock input
SCI1
1 0
CKE0
0 0
R/W
583