Operation - Hitachi H8S/2678 Series Reference Manual

3.7.3

Operation

The interrupt controller has three main functions in DTC and DMAC control.
Selection of Interrupt Source: With the DMAC, the activation source is input directly to each
channel. The activation source for each DMAC channel is selected with bits DTF3 to DTF0 in
DMACR. The selected activation source can be managed by the DMAC or selected with the DTA
bit in DMABCR. When the DTA bit is set to 1, the interrupt source constituting that DMAC
activation source does not function as a DTC activation source or CPU interrupt source.
For interrupt sources other than interrupts managed by the DMAC, it is possible to select DTC
activation request or CPU interrupt request with the DTCE bit of DTCERA to DTCERH in the
DTC.
The DISEL bit in the DTC's MRB register can be used to specify clearing of the DTCE bit to 0
and issuance of an interrupt request to the CPU after a DTC data transfer.
When the DTC has performed the specified number of data transfers and the transfer counter value
is 0, following the DTC data transfer the DTCE bit is cleared to 0 and an interrupt request is sent
to the CPU.
Determination of Priority: The DTC activation source is selected in accordance with the default
priority order, and is not affected by mask or priority levels. Priorities are shown in table 3.12.
With the DMAC, the activation source is input directly to each channel.
Operation Order: If the same interrupt is selected as a DTC activation source and a CPU
interrupt source, the DTC data transfer is performed first, followed by CPU interrupt exception
handling.
If the same interrupt is selected as a DMAC activation source and a DTC activation source or CPU
interrupt source, operations are performed for them independently according to their respective
operating statuses and bus mastership priorities.
Table 3.13 summarizes interrupt source selection and interrupt source clearance control according
to the settings of the DTA bit of DMABCR in the DMAC, the DTCE bit of DTCERA to
DTCERH in the DTC, and the DISEL bit of MRB in the DTC.
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