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Full address mode
DMABCRL
Bit
DMABCRL
DTME1
Initial value
R/W
Read/Write
Channel 1 Data Transfer Master Enable
0
Data transfer disabled. In burst mode,
cleared to 0 by an NMI interrupt
1
Data transfer enabled
7
6
DTE1
DTME0
0
0
R/W
R/W
Channel 0 Data Transfer Master Enable
0
Data transfer disabled. In burst mode,
cleared to 0 by an NMI interrupt
1
Data transfer enabled
Channel 1 Data Transfer Enable
0
Data transfer disabled
1
Data transfer enabled
5
4
DTE0
DTIE1B
0
0
R/W
R/W
Channel 0 Data Transfer Interrupt Enable B
0
Transfer suspended interrupt disabled
1
Transfer suspended interrupt enabled
Channel 1 Data Transfer Interrupt Enable A
0
Transfer end interrupt disabled
1
Transfer end interrupt enabled
Channel 1 Data Transfer Interrupt Enable B
0
Transfer suspended interrupt disabled
1
Transfer suspended interrupt enabled
Channel 0 Data Transfer Enable
0
Data transfer disabled
1
Data transfer enabled
3
2
DTIE1A
DTIE0B
0
0
R/W
R/W
Channel 0 Data Transfer
Interrupt Enable A
0
Transfer end interrupt disabled
1
Transfer end interrupt enabled
1
0
DTIE0A
0
0
R/W
543
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