Features; Block Diagram; Serial Communication Interface - Hitachi H8S/2678 Series Reference Manual

16-bit single-chip microcomputer
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6.9

Serial Communication Interface

6.9.1

Features

• Three independent on-chip channels in the H8S/2678 Series
• Selection of synchronous or asynchronous serial communication mode
• Full-duplex communication capability
• Selection of LSB-first or MSB-first transfer
• Built-in baud rate generator allows any bit rate to be selected
• Selection of transmit/receive clock source
• DTC and DMAC can be activated by four interrupts (ERI, RXI, TXI, and TEI)
• Module stop mode can be set
6.9.2

Block Diagram

RDR
RxD
RSR
TxD
SCK
Legend
SCMR: Smart card mode register
RSR:
Receive shift register
RDR:
Receive data register
TSR:
Transmit shift register
TDR:
Transmit data register
SMR:
Serial mode register
SCR:
Serial control register
SSR:
Serial status register
BRR:
Bit rate register
362
Module data bus
TDR
TSR
Transmission/
reception control
Parity generation
Parity check
Figure 6.9 Block Diagram of SCI
SCMR
BRR
SSR
SCR
Baud rate
generator
SMR
Clock
External clock
Internal
data bus
ø
ø/4
ø/16
ø/64
TEI
TXI
RXI
ERI

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