Pin Configuration - Hitachi H8S/2678 Series Reference Manual

4.1.3

Pin Configuration

Table 4.1 summarizes the pins of the bus controller.
Table 4.1 Bus Controller Pins
Name
Address strobe
Read
High write/write enable
Low write
Chip select 0
Chip select 1
Chip select 2/row address
strobe 2
Chip select 3/row address
strobe 3
Chip select 4/row address
strobe 4
94
Abbre-
viation I/O
AS
Output
RD
Output
HWR
Output
LWR
Output
CS0
Output
CS1
Output
CS2
Output
CS3
Output
CS4
Output
Function
Strobe signal indicating that address output
on address bus is enabled during access to
basic bus interface space.
Strobe signal indicating that basic bus
interface space is being read.
Strobe signal indicating that basic bus
interface space is being written to, and
upper half (D15 to D8) of data bus is
enabled.
DRAM interface space write enable signal.
Strobe signal indicating that basic bus
interface space is being written to, and
lower half (D7 to D0) of data bus is enabled.
Strobe signal indicating that area 0 is
selected.
Strobe signal indicating that area 1 is
selected.
Strobe signal indicating that area 2 is
selected.
DRAM row address strobe signal when
area 2 is DRAM interface space or areas 2
to 5 are continuous DRAM interface space.
Strobe signal indicating that area 3 is
selected.
DRAM row address strobe signal when
area 3 is DRAM interface space.
Strobe signal indicating that area 4 is
selected.
DRAM row address strobe signal when
area 4 is DRAM interface space.