Hitachi H8S/2678 Series Reference Manual page 644

TIER2—Timer Interrupt Enable Register 2
Bit 7
TTGE
Initial value 0
Read/Write R/W
A/D Conversion Start Request Enable
0 A/D conversion start request generation disabled
1
6 5
— TCIEU
1 0
— R/W
Underflow Interrupt Enable
0 Interrupt request (TCIU) by TCFU disabled
1
A/D conversion start request generation enabled
H'FFF4
4 3
TCIEV —
0 0
R/W —
TGR Interrupt Enable B
0
1
Overflow Interrupt Enable
0 Interrupt request (TCIV) by TCFV disabled
1 Interrupt request (TCIV) by TCFV enabled
Interrupt request (TCIU) by TCFU enabled
2 1
— TGIEB
0 0
— R/W
TGR Interrupt Enable A
Interrupt request (TGIA)
0
by TGFA bit disabled
1 Interrupt request (TGIA)
by TGFA bit enabled
Interrupt request (TGIB)
by TGFB bit disabled
Interrupt request (TGIB)
by TGFB bit enabled
TPU2
0
TGIEA
0
R/W
627