Hitachi H8S/2678 Series Reference Manual page 553

IOAR1B—I/O Address Register 1B
15
Bit
IOAR1B
Initial value *
R/W
Read/Write
In short address mode: Specifies transfer destination/transfer source address
In full address mode:
*: Undefined
ETCR1B—Transfer Count Register 1B
Bit
ETCR1B
Initial value
Read/Write
Sequential mode
and idle mode
Repeat mode
Block transfer mode
*: Undefined
Note: Not used in normal mode.
536
14 13 12 11
* * * *
R/W R/W R/W R/W
15 14 13 12
* * * *
R/W R/W R/W R/W
Holds number of transfers
H'FEFC
10 9 8 7
* * * *
R/W R/W R/W R/W
Not used
H'FEFE
11 10 9 8
* * * *
R/W R/W R/W R/W R/W
Transfer counter
Block transfer counter
6 5 4 3
* * * *
R/W R/W R/W R/W
7 6 5 4 3
* * * * *
R/W R/W R/W R/W
Transfer counter
DMAC
2 1 0
* * *
R/W R/W R/W
DMAC
2 1 0
* * *
R/W R/W R/W