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*
P2n
WDDR2: Write to P2DDR
WDR2:
Write to P2DR
RPOR2: Read port 2
RDR2:
Read P2DR
n = 6 or 7
m = 14 or 15
Figure 5.22 Port 2 Block Diagram (b) (Pins P26 and P27)
302
Modes 1, 2, 4, 5, 6
Mode 7
Note:
*
Output enable signal
Priority order: Modes 1, 2, 4, 5, 6, 7 (EXPE = 1)
Reset
R
Q
D
P2nDDR
C
WDDR2
Reset
R
Q
D
P2nDR
C
PPG module
WDR2
Pulse output enable
Pulse output
System controller
EXPE
EXDMAC module
EDREQ acknowledge
enable
EDREQ acknowledge output
TPU module
Output compare output/
PWM output enable
Output compare output/
PWM output
RDR2
RPOR2
Input capture input
Interrupt controller
ITSm
IRQm
EXDMAC > TPU > PPG > DR
Mode 7 (EXPE = 0)
TPU > PPG > DR
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