Hitachi H8S/2678 Series Reference Manual page 530

TMDR5—Timer Mode Register 5
Bit
Initial value
Read/Write
7 6
— —
1 1
— —
5 4
— — MD3
0 0
— — R/W
Mode
0
1
Note: MD3 is a reserved bit. In a write,
H'FEA1
3 2
MD2
0 0
R/W
0 0 0 Normal operation
1 Reserved
1 0 PWM mode 1
1 PWM mode 2
1 0 0 Phase counting mode 1
1 Phase counting mode 2
1 0 Phase counting mode 3
1 Phase counting mode 4
—
* * *
it should always be written with 0.
TPU5
1 0
MD1 MD0
0 0
R/W R/W
*: Don't care
513