Hitachi H8S/2678 Series Reference Manual page 484

16-bit single-chip microcomputer
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7
Bit
DAT1
0
Initial value
Read/Write
R/W
Destination Address Repeat Area
0
0
0
0
0
:
1
1
1
1
1
1
*: Don't care
Destination Address Repeat Interrupt Enable
0
Destination address repeat interrupt is not requested
1
When destination address repeat area overflow occurs,
the IRF bit in EDMDR is set to 1 and an interrupt is requested
Destination Address Update Mode
0
*
Destination address (EDDAR) is fixed
1
0
Destination address is incremented (+1 in byte transfer, +2 in word transfer)
1
Destination address is decremented (–1 in byte transfer, –2 in word transfer)
*: Don't care
6
5
DAT0
DARIE
0
0
R/W
R/W
0
0
0
0
Destination address (EDDAR) is not designated as repeat area
0
0
0
1
Lower 1 bit of EDDAR (2-byte area) designated as repeat area
0
0
1
0
Lower 2 bits of EDDAR (4-byte area) designated as repeat area
0
0
1
1
Lower 3 bits of EDDAR (8-byte area) designated as repeat area
0
1
0
0
Lower 4 bits of EDDAR (16-byte area) designated as repeat area
:
:
:
:
: (Continues in the same way)
0
0
1
1
Lower 19 bits of EDDAR (512-kbyte area) designated as repeat area
0
1
0
0
Lower 20 bits of EDDAR (1-Mbyte area) designated as repeat area
0
1
0
1
Lower 21 bits of EDDAR (2-Mbyte area) designated as repeat area
0
1
1
0
Lower 22 bits of EDDAR (4-Mbyte area) designated as repeat area
0
1
1
1
Lower 23 bits of EDDAR (8-Mbyte area) designated as repeat area
1
Reserved (setting prohibited)
*
*
*
4
3
DARA4
DARA3
0
0
R/W
R/W
2
1
DARA2
DARA1
0
0
R/W
R/W
0
DARA0
0
R/W
467

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