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5.3.2
Register Configuration
Table 5.4 shows the port 2 register configuration.
Table 5.4
Port 2 Registers
Name
Port 2 data direction register
Port 2 data register
Port 2 register
Note: * Lower 16 bits of the address.
Port 2 Data Direction Register (P2DDR)
Bit
7
P27DDR P26DDR P25DDR P24DDR P23DDR P22DDR P21DDR P20DDR
Initial value
0
Read/Write
W
P2DDR is an 8-bit write-only register, the individual bits of which specify input or output for the
pins of port 2. P2DDR cannot be read; if it is, an undefined value will be read.
Setting a P2DDR bit to 1 makes the corresponding port 2 pin an output pin, while clearing the bit
to 0 makes the pin an input pin.
P2DDR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in
software standby mode.
Port 2 Data Register (P2DR)
Bit
7
P27DR
Initial value
0
Read/Write
R/W
P2DR is an 8-bit readable/writable register that stores output data for the port 2 pins (P27 to P20).
P2DR is initialized to H'00 by a reset and in hardware standby mode. It retains its prior state in
software standby mode.
204
Abbreviation
P2DDR
P2DR
PORT2
6
5
0
0
W
W
6
5
P26DR
P25DR
0
0
R/W
R/W
R/W
W
R/W
R
4
3
0
0
W
W
4
3
P24DR
P23DR
0
0
R/W
R/W
Initial Value
Address*
H'00
H'FE21
H'00
H'FF61
Undefined
H'FF51
2
1
0
0
W
W
2
1
P22DR
P21DR
0
0
R/W
R/W
0
0
W
0
P20DR
0
R/W
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