Hitachi H8S/2678 Series Reference Manual page 334

*
P7n
WDDR7: Write to P7DDR
WDR7: Write to P7DR
WPFCR2: Write to PFCR2
RPOR7: Read port 7
RDR7: Read P7DR
RPFCR2: Read PFCR2
n = 2 or 3
Figure 5.39 Port 7 Block Diagram (b) (Pins P72 and P73)
Modes 1, 2, 4, 5, 6
Mode 7
Note: * Output enable signal
Priority order: Modes 1, 2, 4, 5, 6, 7 (EXPE = 1)
Reset
R
Q D
P7nDDR
C
WDDR7
Reset
R
Q D
P7nDR
C
WDR7
Reset
R
Q D
PFCR2
DMACS
C
WPFCR2
RPFCR2
DMA controller
DMA transfer end enable
DMA transfer end
System controller
EXPE
EXDMA controller
EXDMA transfer end enable
EXDMA transfer end
RDR7
RPOR7
DMACS = 1
EXDMAC > DMAC > DR
DMACS = 0
EXDMAC > DR
Mode 7 (EXPE = 1)
DMACS = 1
DMAC > DR
DMACS = 0
DR
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