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By WAIT pin
By program wait
T
T
T
T
T
T
1
2
w
w
w
3
ø
WAIT
Address bus
AS
RD
Read
Data bus
Read data
HWR, LWR
Write
Data bus
Write data
Notes: 1. Downward arrows indicate the timing of WAIT pin sampling.
2. When RDNn = 0
Figure 4.17 Example of Wait State Insertion Timing
The settings after a reset are: 3-state access, insertion of 7 program wait states, and WAIT input
disabled.
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