Hitachi H8S/2678 Series Reference Manual page 559

DMABCRH—DMA Band Control Register
DMABCRL—DMA Band Control Register
Full address mode
DMABCRH
Bit 15
DMABCRH FAE1
0
Initial value
R/W
Read/Write
Channel 1 Full Address Enable
0
1
542
14 13
FAE0 —
0 0
R/W R/W
Channel 1 Data Transfer Acknowledge
0 Clearing of selected internal interrupt source
at time of DMA transfer is disabled
1 Clearing of selected internal interrupt source
at time of DMA transfer is enabled
Channel 0 Full Address Enable
0 Short address mode
1 Full address mode
Short address mode
Full address mode
H'FF26
H'FF27
12 11
— DTA1
0 0
R/W R/W
Channel 0 Data Transfer Acknowledge
0 Clearing of selected internal interrupt source
at time of DMA transfer is disabled
1 Clearing of selected internal interrupt source
at time of DMA transfer is enabled
10 9
— DTA0
0 0
R/W R/W
DMAC
DMAC
8
—
0
R/W