Dma Channel Control Register (Dmaccr); Channel Auto-Initialization Capability - Texas Instruments OMAP5910 Reference Manual

7.2.4

Channel Auto-Initialization Capability

Figure 69.

DMA Channel Control Register (DMACCR)

15
7
Note: R = Read, W = Write, −n = Value after DSP reset
SPRU890A
After a block transfer is completed (all of the elements and frames in a block
have been moved), the DMA controller automatically disables the channel. If
the channel must be used again, the DSP core can reprogram the new channel
context and re-enable the DMA channel, or the DMA controller can
automatically initialize the new context and re-enable the channel.
When auto-initialization is used, the DMA controller automatically copies the
channel context (identical or new) after each block transfer is completed from
the configuration registers to the working registers and re-enables the
channel, allowing the channel to run again. Auto-initialization is enabled by
setting the AUTOINIT bit in the channel controller register (DMACCR).
Two additional bits in DMACCR, REPEAT and ENDPROG, are used during
the auto-initialization operation. REPEAT controls whether the DMA controller
waits for an indication from the DSP core that the configuration registers are
ready to be copied. ENDPROG is a handshaking bit used to communicate
between the DSP core and the DMA controller regarding the state of the
register copy process. Figure 69 shows DMACCR and Table 44 describes
AUTOINIT, REPEAT, and ENDPROG. For a complete description of
DMACCR, see section 7.3.5.
There are two methods for using auto-initialization. The same channel context
can be repeated on each block transfer, or a new context can be provided for
each transfer. The following sections explain these two cases are explained.
12 11 10
ENDPROG
RW-0
DSP DMA
9 8
REPEAT AUTOINIT
RW-0 RW-0
0
DSP Subsystem 127