Emif Global Reset Register (Grr); Emif Global Control Register (Gcr) Field Descriptions; Emif Global Reset Register (Grr) Field Descriptions - Texas Instruments OMAP5910 Reference Manual

DSP External Memory Interface
Table 17. EMIF Global Control Register (GCR) Field Descriptions
Bits Field
15−8 Reserved
7 WPE
6−0 Reserved
5.3.3

EMIF Global Reset Register (GRR)

Figure 20. EMIF Global Reset Register (GRR)
15
Note: R = Read, W = Write; −n = Value after reset;, −x = Value after reset is not defined
Table 18. EMIF Global Reset Register (GRR) Field Descriptions
Bits Field
15−0 EMIFRST
64 DSP Subsystem
Value Description
These bits are not used. Writable bits should be kept as 0 during writes
to this register.
Write posting enable bit. Use WPE to enable or disable the write
posting feature of the EMIF. WPE affects all accesses to DSP external
memory.
0 Disabled.
1 Enabled.
These bits are not used. Writable bits should be kept as 0 during writes
to this register.
The EMIF Global Reset Register is used to reset the EMIF state machine.
EMIFRST
Value Description
Any write to this register resets the EMIF state machine.
W-x
8
SPRU890A