Mmu Fault Status Register (Fault_St_Reg); Mmu Fault Status Register (Fault_St_Reg) Field Descriptions - Texas Instruments OMAP5910 Reference Manual

6.5.6

MMU Fault Status Register (FAULT_ST_REG)

Figure 52. MMU Fault Status Register (FAULT_ST_REG)
31
Reserved
Note: R = Read; W = Write; −n = Value after reset; −x = Value after reset is not defined.
Table 27. MMU Fault Status Register (FAULT_ST_REG) Field Descriptions
Bits Field
31−4 Reserved
3 PREFETCH_ERR
SPRU890A
When an error is generated by the MMU, the MMU Fault Status Register
(FAULT_ST_REG) determines the cause of the error. The MMU generates
errors based on the following conditions:
TLB miss (table walker disabled):
-
No translation is found in the TLB for the virtual address issued. The
hardware table walker is disabled, and thus, the translation cannot be
retrieved from the translation table(s).
Translation fault (table walker enabled):
-
No translation is found for the virtual address required (TLB miss). The
table walker is enabled, but no valid page table entry exists for the given
virtual address.
Permission fault:
-
The section/page access permissions do not match the access type.
Table walker logic pre-fetch error:
-
An error occurred during an address-translation pre-fetch request from
the DSP core. The error may have occurred due to a TLB miss or a
translation fault.
After the MPU core clears the error condition, it must acknowledge the error
using the Interrupt Acknowledge Register (IT_ACK_REG). Section 6.2.7
describes the steps needed to clear the MMU error conditions.
4
R-0
Value Description
These bits are not used.
This bit indicates when table walking logic was unable to pre-fetch an
entry for the TLB.
0 No pre-fetch error has occurred.
1 A pre-fetch error has occurred.
DSP Memory Management Unit
3 2
PREFETCH_ PERM_
ERR FAULT
R-0 R-0
1 0
TLB_ TRANS_
MISS FAULT
R-0 R-0
DSP Subsystem 107