Mmu Msb Ram Entry Register (Ram_H_Reg) Field Descriptions; Mmu Ram Entry Registers (Ram_H_Reg, Ram_L_Reg) - Texas Instruments OMAP5910 Reference Manual

DSP Memory Management Unit
6.5.12

MMU RAM Entry Registers (RAM_H_REG, RAM_L_REG)

Figure 58. MMU RAM Entry Registers (RAM_H_REG, RAM_L_REG)
RAM_H_REG
31
Reserved
RAM_L_REG
31
15
PHYS_TAG_L
RW-0
Note: R = Read; W = Write; −n = Value after reset; −x = Value after reset is not defined.
Table 35. MMU MSB RAM Entry Register (RAM_H_REG) Field Descriptions
Bits Field
31−16 Reserved
15−0 PHYS_TAG_H
Table 36. MMU LSB RAM Entry Register (RAM_L_REG) Field Descriptions
Bits Field
31−16 Reserved
15−10 PHYS_TAG_L
114 DSP Subsystem
The RAM Entry Registers specify a RAM value to be written into the TLB.
16
R-0
10 9
Value Description
These bits are not used.
These are the most-significant bits of the physical address tag
corresponding to the TLB entry. The PHYS_TAG bits correspond
to bits 31−10 of the physical memory address. Note that,
depending on the page size, not all of the PHYS_TAG bits are
needed; these unneeded bits must be written as zeros.
Value Description
These bits are not used.
These are the least-significant bits of the physical address tag
corresponding to the TLB entry. The PHYS_TAG bits correspond to
bits 31−10 of the physical memory address. Note that, depending on
the page size, not all of the PHYS_TAG bits are needed; these
unneeded bits must be written as zeros.
15
Reserved
R-0
8
AP
RW-0
PHYS_TAG_H
RW-0
7
Reserved
RW-0
SPRU890A
0
16
0