DSP Memory Management Unit
Figure 22.
Task Protection
6.1.2
Features
66
DSP Subsystem
Virtual memory
Task 1
Task 2
In Figure 22, task 1 and task 2 are located adjacent in physical memory. In
systems without an MMU, there is a danger that task 1 will accidentally write
into the memory area allocated to task 2, and vice versa. Using an MMU,
unmapped memory regions can be placed between tasks. Therefore, the
MMU can easily detect any erroneous accesses to unmapped memory
regions in the virtual address space.
The DSP MMU in OMAP5910 and OMAP5912 devices includes the following
features:
A translation look-aside buffer (TLB), which stores recently-used
-
translations. The TLB acts like a cache of recently read translation table
entries. Translations can also be manually written to the TLB by the MPU
core.
Table walking logic, which automatically retrieves a translation from a set
-
of translation tables and updates the TLB.
Physical memory
Error
Task 1
Task 2
SPRU890A