DSP Memory Management Unit
Figure 51.
MMU Fault Address Registers (FAULT_AD_H_REG, FAULT_AD_L_REG)
FAULT_AD_H_REG
31
FAULT_AD_L_REG
31
Reserved
R = Read; W = Write; −n = Value after reset; −x = Value after reset is not defined.
Note:
Table 25. MMU MSB Fault Address Register (FAULT_AD_H_REG) Field Descriptions
Bits
Field
31−16 Reserved
15−0
FAULT_ADDRESS_MSB
Table 26. MMU LSB Fault Address Register (FAULT_AD_L_REG) Field Descriptions
Bits
Field
31−16 Reserved
15−0
FAULT_ADDRESS_LSB
106
DSP Subsystem
Reserved
R-0
16
R-0
Value Description
These bits are not used.
Most-significant bits of the 24-bit virtual address which caused a
fault.
Value Description
These bits are not used.
Least-significant bits of the 24-bit virtual address which caused a
fault.
8
FAULT_ADDRESS_MSB
15
FAULT_ADDRESS_LSB
RW-0
7
0
RW-0
0
SPRU890A