Reset Considerations - Texas Instruments OMAP5910 Reference Manual

DSP DMA
Bits Field
9−5 CONF_DSP_DMA_
EVT_14
4−0 CONF_DSP_DMA_
EVT_13
Functional Multiplexing DSP DMA Register D (FUNC_MUX_DSP_DMA_D)
Figure 79. Functional Multiplexing DSP DMA Register D (FUNC_MUX_DSP_DMA_D)
31
15
R = Read; W = Write; −n = Value after reset; −x = Value after reset is not defined.
Note:
Table 57. Functional Multiplexing DSP DMA Register D (FUNC_MUX_DSP_DMA_D)
Field Descriptions
Bits Field
31−5 Reserved
4−0 CONF_DSP_DMA_
EVT_19
7.2.14

Reset Considerations

154 DSP Subsystem
Value Description
0−27 Configuration bits for DMA event 14. Writing a value n to this
register maps peripheral request source n+1 to DSP DMA event
14. The value n must be between 0 and 27.
0−27 Configuration bits for DMA event 13. Writing a value n to this
register maps peripheral request source n+1 to DSP DMA event
13. The value n must be between 0 and 27.
This global control register (see Figure 79 and Table 57) is a 32-bit read/write
register. Use this OMAP configuration register to set the peripheral request
associated with DMA event 19.
Reserved
Reserved
RW-0x00
Value Description
These read-only bits return 0s when read.
0−27 Configuration bits for DMA event 19. Writing a value n to this
register maps peripheral request source n+1 to DSP DMA event
19. The value n must be between 0 and 27.
A DSP subsystem reset resets the DMA controller and the DMA configuration
registers. Some of the registers are initialized after reset and some are not.
The register definitions included in section 7.3 indicate the register contents
after a DSP subsystem reset.
RW-0
5 4
CONF_DSP_DMA_EVT_19
16
0
RW-0x00
SPRU890A