Bootloader Sequence - Texas Instruments OMAP5910 Reference Manual

12.4.4

Bootloader Sequence

12.4.4.1 Direct Boot Mode
12.4.4.2 Other Valid Boot Modes
SPRU890A
If the application has been previously loaded and another external reset is
necessary (warm boot), the MPU core can reset the DSP subsystem without
reloading the application code, and the application execution will begin.
The next two sections describe the entire bootloader sequence for all of the
boot mode options.
In the Direct Boot Mode (BOOT_MOD[3:0] = 0000b) the on-chip PDROM is
disabled and all PDROM memory map addresses are located in DSP external
memory. When the MPU core releases the DSP subsystem from reset, the
DSP core fetches the interrupt vector table starting at byte address 0xFF
FF00. The physical location of the interrupt vector table in OMAP system
memory is dependent on the use of the DSP MMU.
When BOOT_MOD contains a value other than 0000b, the on-chip PDROM
is enabled and all PDROM memory map addresses are located in internal
memory. The DSP core fetches the interrupt vector table starting at byte
address 0xFF FF00 after the DSP subsystem is released from reset. The
interrupt vector table then directs program execution to the DSP bootloader
starting at byte address 0xFF 8000. At this point, the bootloader starts to
execute.
The bootloader checks to see if the MPUI RAM is in shared-access mode
(SAM) by checking the HOM_R bit of ST3_55. If not, the bootloader keeps
checking indefinitely; it does not request an access mode change for the MPUI
RAM. As soon as the MPUI RAM is in SAM, it does the following initialization:
Sets up the stack pointers. The data stack register (SP) is initialized to
-
address 00 00A0h, and the system stack register (SSP) is initialized to
address 00 00C0h.
The stack configuration is set to the dual 16-bit stack mode with fast return.
Disables interrupts globally. The INTM bit of ST1_55 is set.
-
Disables sign extension. The SXMD bit of ST1_55 is cleared.
-
Disables the C54x compatibility mode. The C54CM bit of ST1_55 is
-
cleared.
After this is done, the bootloader checks the BOOT_MOD[3:0] bits of the
DSP_BOOT_CONFIG register and takes action as described in section
12.4.3.
DSP Subsystem Reset, Clocking, Idle Control, and Boot
DSP Subsystem 233