Changing Idle Configurations; Condition 1: Cpu Domain Active - Texas Instruments OMAP5910 Reference Manual
Multimedia processor dsp subsystem
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DSP Subsystem Reset, Clocking, Idle Control, and Boot
Table 97. Changing Idle Configurations
Condition
1. CPU domain
is active
2. CPU domain
is idle
Condition 1: CPU Domain Active
Condition 2: CPU Domain Idle
222
DSP Subsystem
Available Methods For
Changing Idle Configuration
A. Write a new configuration to the
idle configuration register (ICR),
and
then
execute
the
instruction.
B. Initiate a DSP hardware reset.
A. Use an unmasked hardware
interrupt.
B. Initiate a DSP hardware reset.
When the CPU domain is active (the DSP core is running), program flow con-
tinues. In this case, there are two methods of changing idle configurations:
Write a new idle configuration to the idle configuration register (ICR), and
-
then execute the IDLE instruction. The IDLE instruction copies the content
of the ICR to the idle status register (ISTR), and the ISTR bit values are
propagated to the idle domains. After the domains change states, the
value in ISTR matches the value in ICR.
Initiate a DSP subsystem reset. When the DSP subsystem resets, all
-
domains are made active.
When the CPU domain is idle, program flow is halted. It is not possible to write
a new value to the idle configuration register (ICR) or to execute the IDLE
instruction. Two methods are available for changing the idle configuration:
Use an unmasked interrupt. The interrupt clears the CPUIS bit of the idle
-
status register (ISTR). The change to CPUIS reactivates the CPU domain.
The content of the idle configuration register (ICR) is not modified. To learn
how the DSP core responds to the interrupt, see section 12.3.2.5.
Initiate a DSP subsystem reset. When the DSP subsystem resets, all
-
domains are made active.
Once program flow has begun again, you can reactivate or deactivate other
domains by writing a new idle configuration to ICR and then executing the IDLE
instruction.
ISTR After Change
A. Modified by the IDLE
instruction;
contains a
IDLE
copy of the new ICR
value.
B. Cleared (all 0s).
A. CPUIS bit is 0. No other
bits were modified.
B. Cleared (all 0s).
ICR After Change
A. Contains the new
value loaded by the
program.
B. Cleared (all 0s).
A. Not modified.
B. Cleared (all 0s).
SPRU890A
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