Mmu Read/Write Tlb Entry Register (Ld_Tlb_Reg); Mmu Cam Entry Registers (Cam_H_Reg, Cam_L_Reg) - Texas Instruments OMAP5910 Reference Manual

Multimedia processor dsp subsystem
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DSP Memory Management Unit
Table 32. MMU Read/Write TLB Entry Register (LD_TLB_REG) Field Descriptions
Bits
Field
31−2
Reserved
1
READ_ENTRY
0
WRITE_ENTRY
6.5.11

MMU CAM Entry Registers (CAM_H_REG, CAM_L_REG)

Figure 57.
MMU CAM Entry Registers (CAM_H_REG, CAM_L_REG)
CAM_H_REG
31
15
CAM_L_REG
31
15
VA_TAG_L
Note:
R = Read; W = Write; −n = Value after reset; −x = Value after reset is not defined.
112
DSP Subsystem
Value Description
These bits are not used.
Read the TLB entry. Writing 1 to this field causes an entry to be read
from the TLB. This bit is always 0 when read.
0
Writing a 0 to this bit has no effect.
1
Read the TLB entry specified by the victim pointer.
Write the TLB entry. Writing 1 to this field causes an entry to be loaded
into the TLB. This bit is always 0 when read.
0
Writing a 0 to this bit has no effect.
1
Write the programmed entry to the TLB at location specified by the
victim pointer.
The CAM Entry Registers specify a CAM value to be written into the TLB.
Reserved
R-0
4
RW-0
Reserved
R-0
Reserved
R-0
3
PRE-
VALID
SERVED
RW-0
R-0
2
1
VA_TAG_H
RW-0
2
1
SLST
RW-0
SPRU890A
16
0
16
0

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