Registers Used To Define The Start Addresses For A Dma Transfer; Units Of Data: Byte, Element, Frame, And Block - Texas Instruments OMAP5910 Reference Manual

7.2.7

Units of Data: Byte, Element, Frame, and Block

7.2.8 Start Address in a Channel
Table 46. Registers Used to Define the Start Addresses for a DMA Transfer
SPRU890A
This documentation on the DMA controller refers to data in four levels of
granularity:
Byte: An 8-bit value. A byte is the smallest unit of data transferred in a DMA
-
channel.
Element: One or more bytes to be transferred as a unit. Depending on the
-
programmed data type, an element is an 8-bit, 16-bit, or a 32-bit value. An
element transfer cannot be interrupted; all of its bytes are transferred to
a port before another channel or the MPUI can take control of the port.
Frame: One or more elements to be transferred as a unit. A frame transfer
-
can be interrupted between element transfers.
Block: One or more frames to be transferred as a unit. Each channel can
-
transfer one block of data (once or multiple times). A block transfer can be
interrupted between frame transfers and element transfers.
For each of the six DMA channels, you can define the number of frames in a
block (with DMACFN), the number of elements in a frame (with DMACEN), and
the number of bytes in an element (with the DATATYPE bits in DMACSDP).
For descriptions of DMACFN, DMACEN, DMACSDP, and other registers of
the DMA controller, see section 7.3.
During a data transfer in a DMA channel, the first address at which data is read
is called the source start address. The first address to which the data is written
is called the destination start address. These are byte addresses. From the
standpoint of the DMA controller, every 8 bits in memory or I/O space has its
own address. Each channel contains the following registers for specifying the
start addresses:
Register
DMACSSAL
DMACSSAU
DMACDSAL
DMACDSAU
The following sections explain how to load the start address registers for
memory accesses and I/O accesses. The DMA controller can access all of the
internal and DSP external memory and all of I/O space (which contains
registers for the DSP peripherals).
Load With:
Source start address (lower part)
Source start address (upper part)
Destination start address (lower part)
Destination start address (upper part)
DSP DMA
DSP Subsystem 137