Mmu Msb Cam Entry Register (Cam_H_Reg) Field Descriptions; Mmu Lsb Cam Entry Register (Cam_L_Reg) Field Descriptions - Texas Instruments OMAP5910 Reference Manual

Table 33. MMU MSB CAM Entry Register (CAM_H_REG) Field Descriptions
Bits Field
31−2 Reserved
1−0 VA_TAG_H
Table 34. MMU LSB CAM Entry Register (CAM_L_REG) Field Descriptions
Bits Field
31−16 Reserved
15−4 VA_TAG_L
3 PRESERVED
2 VALID
1−0 SLST
SPRU890A
Value Description
These bits are not used.
0x0− Most-significant bits of the virtual address tag. The VA_TAG bits
0x3 correspond to bits 23−10 of the DSP virtual address. Note that,
depending on the page size, not all of the VA_TAG bits are needed;
these unneeded bits must be written as zeros.
Value Description
These bits are not used.
Least-significant bits of the virtual address tag. The VA_TAG bits
correspond to bits 23−10 of the DSP virtual address. Note that,
depending on the page size, not all of the VA_TAG bits are needed;
these unneeded bits must be written as zeros.
Preserve bit for the TLB entry. This bit specifies whether the TLB
entry should be kept during a TLB global flush.
0 TLB entry is not preserved during a TLB global flush.
1 TLB entry is preserved during a TLB global flush.
Valid bit for the TLB entry. This bit specifies whether the TLB entry
is valid.
0 TLB entry is not valid.
1 TLB entry is valid.
Size of physical memory covered by the TLB entry.
00 TLB entry covers an entire section.
01 TLB entry covers a large page.
10 TLB entry covers a small page.
11 TLB entry covers a tiny page.
DSP Memory Management Unit
DSP Subsystem 113