Mmu Interrupt Acknowledge Register (It_Ack_Reg) - Texas Instruments OMAP5910 Reference Manual

DSP Memory Management Unit
Table 27. MMU Fault Status Register (FAULT_ST_REG) Field Descriptions (Continued)
Bits Field
2 PERM_FAULT
1 TLB_MISS
0 TRANS_FAULT
6.5.7

MMU Interrupt Acknowledge Register (IT_ACK_REG)

Figure 53. MMU Interrupt Acknowledge Register (IT_ACK_REG)
31
Note: R = Read; W = Write; −n = Value after reset; −x = Value after reset is not defined.
108 DSP Subsystem
Value Description
This bit indicates when the DSP core attempted to access a
section/page without the proper access permissions.
0 No permission fault exists.
1 A permission fault has been generated.
This bit indicates a TLB miss has been generated and the table
walking logic is disabled.
0 No error of this type has occurred.
1 A TLB miss has been generated and the table walking logic is not
enabled.
This bit indicates a TLB miss has been generated and the table
walking logic was unable to find a valid section/page table entry for the
given virtual address.
0 No error of this type has occurred.
1 The table walking logic was not able to find a valid section/page table
entry to service the TLB miss.
Use this register to signal to the MMU that the MPU core has taken care of the
error condition displayed by the Fault Status Register (FAULT_ST_REG). See
section 6.2.7 for more details.
Reserved
R-0
1 0
IT_ACK
W-0
SPRU890A