Dsp Subsystem External Memory Interface; Software Configuration - Texas Instruments OMAP5910 Reference Manual

Figure 46.

DSP Subsystem External Memory Interface

6.3.2

Software Configuration

SPRU890A
OMAP device
DSP subsystem
Requestors
DMA
DSP core
data buses
DSP core
program buses
The DSP MMU is initialized by the MPU core. To prevent a DSP access to DSP
external memory while the MMU is disabled, it is recommended that the MMU
be initialized and enabled before the DSP subsystem is taken out of reset.
The MPU core must follow these steps to initialize and enable the DSP MMU:
1) Configure and enable the DSP MMU clock:
a) The MMU clock is derived from the CK_GEN2 clock domain. The
DSPMMUDIV bits of the ARM_CKCTL register are used to divide the
CK_GEN2 clock by 1, 2, 4, or 8. The MMU clock has specific
restrictions. See section 6.2.9 for more details.
2) Take the DSP MMU out of reset by setting the MMU_RESET of the
CNTL_REG.
3) Write entries to the TLB.
a) Determine CAM and RAM parameters and write them into the CAM
and RAM registers (CAM_H_REG, CAM_L_REG, RAM_H_REG,
and RAM_L_REG). See section 6.2.2.1 for information on CAM and
RAM values.
b) Select the TLB entry to be written by setting the victim pointer through
the Lock/Protect Entry Register (LOCK_REG). For example, to
update entry 0 in the TLB, write 0 to the victim pointer field of
LOCK_REG.
c) Set the WRITE_ENTRY bit in the Read/Write TLB Entry Register
(LD_TLB_REG).
d) Repeat these steps for every entry that is to be written to the TLB.
DSP Memory Management Unit
DSP MMU
Addr. Addr.
Address
conversion
Data Data
Endianess
conversion
Access
checking
Resources
IMIF
Internal
SRAM
Traffic
controller
EMIFS
Flash
EMIFF
SDRAM
DSP Subsystem 97