Determining Physical Address Tags For Tlb Ram Entries - Texas Instruments OMAP5910 Reference Manual

Figure 28.

Determining Physical Address Tags for TLB RAM Entries

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6.2.2.2 TLB Address Translation Process
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When an external memory request is generated by the DSP EMIF, the DSP
MMU first checks the contents of the TLB to determine whether a
corresponding address translation is present. To determine if the address
translation is in the TLB, the MMU performs these steps:
1) Generates a virtual address tag by taking the 14 most-significant address
bits of the virtual address (bits 23:10).
2) Compares the virtual address tag to the tags contained in valid TLB entries
Note that although the number of bits needed for an address translation
depends on the size of the memory block described by the entry, the entire
contents of the virtual address tags are compared. Therefore, as
described in section 6.2.2.1, it is important to keep unneeded bits as zero
when writing entries in the TLB.
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DSP Subsystem 73