Omap5910 Level 1 Interrupt Mapping - Texas Instruments OMAP5910 Reference Manual

DSP Subsystem Interrupts
Table 91. OMAP5910 Level 1 Interrupt Mapping
Hardware C55x DSP
Interrupt Core Vector
Priority
1 RESETIV (IV0)
2 NMIIV (IV1)
3
5
6
7
9
10
11
13
14
15
17
18
21
22
4
8
†
NMI is not physically connected on OMAP devices, it is included here for compatibility with other C55x documentation.
208 DSP Subsystem
Vector
Address
Name (Byte Address)
IVPD:00h
IVPD:08h
IV2 IVPD:10h
IV3 IVPD:18h
IV4 IVPD:20h
IV5 IVPD:28h
IV6 IVPD:30h
IV7 IVPD:38h
IV8 IVPD:40h
IV9 IVPD:48h
IV10 IVPD:50h
IV11 IVPD:58h
IV12 IVPD:60h
IV13 IVPD:68h
IV14 IVPD:70h
IV15 IVPD:78h
IV16 IVPH:80h
IV17 IVPH:88h
Name
RESET DSP reset (hardware or
†
NMI /SINT1 Hardware nonmaskable
interrupt (or software
EMUINT DSP emulator/test interrupt
L2FIQ DSP level 2 interrupt
TCABORT Traffic controller abort
MBX1 MPU-to-DSP mailbox 1
SINT6 Software interrupt #6
GPIO Interrupt for DSP-owned shared
TIMER3 DSP private timer #3 interrupt
DMAC1 DSP DMA channel #1
MPU MPU interrupt to DSP
SINT11 Software interrupt #11
UART3
WDT DSP watchdog timer interrupt
DMAC4 DSP DMA channel #4
DMAC5 DSP DMA channel #5
EMIF Interrupt for DMA EMIF
interface to traffic controller
LCLBUS
Interrupt Source
software) interrupt
interrupt #1)
handler FIQ
interrupt
interrupt
GPIO
interrupt
UART #3 interrupt
interrupt
interrupt
Local bus interrupt
SPRU890A