First-Level Descriptor Address Calculation - Texas Instruments OMAP5910 Reference Manual

Figure 37.

First-Level Descriptor Address Calculation

31
Translation table base
31
Translation table base
6.2.5.1 First-Level Descriptor
SPRU890A
The 25 most-significant bits of the first-level translation table start address are
called the translation table base. The translation table base is set by writing
to the MMU Translation Table Registers (TTB_H_REG and TTB_L_REG). The
four most-significant bits of the DSP virtual address are called the table index.
The translation table base and the table index are used to calculate the
address of the first-level descriptor (see Figure 37).
Notice that first-level descriptors have 32-bit addresses; consequently, they
are aligned on 4-byte boundaries and the two least-significant bits of their
addresses are zeros.
Once the descriptor address is known, the descriptor contents can be decoded
to determine the translation information for the section. The next section
describes the information contained in the descriptor.
Each first-level descriptor provides either the complete address translation for
a section or a pointer to a second-level translation table. The descriptor can
also indicate that a fault error must be generated if the section in virtual
memory is accessed.
The least-significant two bits of the descriptor contents determine the type of
information contained in the descriptor. Figure 38 shows how the contents of
the first-level descriptor are interpreted based on the two least-significant bits.
Table 19 further explains the meaning of each combination.
7 6
0 0 0 0 0 0 0
23 20
DSP virtual
address
First-level
table index
7 6 5
0
DSP Memory Management Unit
0
Translation table
base address
19
Section index
2 1 0
First-level
0 0 0
descriptor
address
DSP Subsystem
0
85