Fetch Address Fields For The 2-Way Cache Register; Fetch Address Fields For A Ram Set; Fetch Address Field Descriptions For The 2-Way Cache Register Field Descriptions; Fetch Address Field Descriptions For A Ram Set - Texas Instruments OMAP5910 Reference Manual

Instruction Cache
Figure 8.

Fetch Address Fields for the 2-Way Cache Register

23
Tag
11 bits
Note: R = Read, W = Write
Table 2. Fetch Address Field Descriptions for the 2-Way Cache Register Field
Descriptions
Bits Field
23−13 Tag
12−4 Index
3−2 Offset
1−0 Byte
Figure 9.

Fetch Address Fields for a RAM Set

23
Tag
12 bits
Note: R = Read, W = Write
Table 3.

Fetch Address Field Descriptions for a RAM Set

Bits Field
23−13 Tag
11−4 Index
3−2 Offset
1−0 Byte
36 DSP Subsystem
13 12
Value Description
Whenever a line of the 2-way cache is loaded from DSP external memory,
the tag portion of the fetch address is stored with the line (in the tag array).
During an instruction presence check, the I-Cache uses the Index field to find
the addressed set and then compares both tags in the set with the tag portion
of the fetch address.
This 9-bit value references one of the 512 sets of the 2-way cache. As shown
in Figure 6, each set has two lines.
When the I-Cache must read a 32-bit word from one of the lines of the 2-way
cache, the offset field indicates which of the four 32-bit words in the line
should be read.
This field is not used by the I-Cache but is the part of the fetch address that
indicates the specific byte being addressed.
12 11
Value Description
During an instruction presence check, the I-Cache compares the tag portion
of the fetch address with the tag defined in the RAM-set tag register.
This 8-bit value references one of the 256 lines of the RAM set.
When the I-Cache must read a 32-bit word from one of the lines of the RAM
set, the offset field indicates which of the four 32-bit words in the line should
be read.
This field is not used by the I-Cache but is the part of the fetch address that
indicates the specific byte being addressed.
4
Index
9 bits
4
Index
8 bits
3 2 1 0
Offset Byte
2 bits 2 bits
3 2 1 0
Offset Byte
2 bits 2 bits
SPRU890A