Endianess Conversion By The Mpui - Texas Instruments OMAP5910 Reference Manual

Multimedia processor dsp subsystem
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Figure 94.
DSP MMU Endianess Control Register (DSP_ENDIAN_CONV)
31
15
Note:
R = Read, W = Write; −n = Value after reset; −x = Value after reset is not defined.
Table 88. DSP MMU Endianess Control Register (DSP_ENDIAN_CONV) Field
Descriptions
Bits
Field
31−2
Reserved
1
SWAP
0
EN
10.3.2

Endianess Conversion by the MPUI

SPRU890A
Reserved
Reserved
R-0
Value Description
These bits are not used.
When the DSP MMU endianess conversion unit is enabled, this bit
selects the swapping mode.
0
Swap bytes and 16-bit words.
1
Swap 16-bit words only.
This bit is used to enable the endianess configuration unit of the DSP
MMU.
0
Endianess conversion unit is disabled.
1
Endianess conversion unit is enabled. Endianess conversion is
carried out as dictated by the SWAP bit.
The MPU Interface (MPUI) enables accesses from MPU core and system
DMA to the DSP subsystem internal resources. Internal resources include the
DSP subsystem internal memory (through the MPUI port, section 9) and the
DSP public peripherals (through the public TIPB Bridge, section 8).
The endianess conversion unit within the MPUI offers the options of controlling
byte swapping and word swapping depending on the access type (memory or
peripheral). Its architecture is similar to that used within the DSP MMU.
R-0
2
DSP Subsystem Endianess
1
0
SWAP
EN
RW-0
RW-0
DSP Subsystem
16
201

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