Dsp Pdrom Contents; Bootloader Initialization; Bootloader Operation - Texas Instruments OMAP5910 Reference Manual

Table 102. DSP PDROM Contents
12.4.2

Bootloader Operation

12.4.2.1

Bootloader Initialization

Table 103. Bootloader Initialization
SPRU890A
Starting Byte
Address
0xFF_8000
0xFF_8200
0xFF_FF00
The following sections describe the structure and operation of the bootloader.
When the bootloader begins execution, it performs some initialization of DSP
resources prior to loading code. Table 103 describes the DSP resources that
are configured by the bootloader.
Resource
Stack registers
Stack configuration
Interrupts
Sign extension
Compatibility mode
To avoid corruption of default stack locations, the sections loaded into internal
memory should not be between word addresses 0000h and 0100h (byte
address 0000h-0200h).
After the initialization is performed, the bootloader branches to the starting
point address specified through the selected boot mode. At that point, the boot
load process is complete. Whenever the DSP subsystem is reset, the DSP
core starts the execution of the bootloader again, and the entire boot process
is repeated.
DSP Subsystem Reset, Clocking, Idle Control, and Boot
Contents
DSP Bootloader
Reserved
Interrupt Vector Table
Initialization Value
The data stack register (SP) is initialized with address
0000A0h, and the system stack register (SSP) is
initialized with address 0000C0h.
The stack configuration is set to the dual 16-bit stack
mode with fast return.
The INTM bit of Status Register 1 (ST1_55) is set to the
default value of 1, to disable interrupts.
The SXMD bit of Status Register 1 (ST1_55) is cleared, to
disable the sign extension mode.
The C54CM bit of Status Register 1 (ST1_55) is cleared,
to disable the C54x compatibility mode.
DSP Subsystem 229