Data Burst Capability - Texas Instruments OMAP5910 Reference Manual

7.2.11

Data Burst Capability

SPRU890A
Data bursts can be used to improve DMA controller throughput if one or both
of the ports associated with the DMA channel support burst capability. When
bursting is enabled, the DMA controller executes a burst of four elements each
time a channel is serviced instead of moving a single element. The SARAM
and DARAM ports support burst capability. The EMIF port will burst data only
if the traffic controller memory interface used to fetch the data supports
bursting. The traffic controller memory interfaces include the internal memory
interface (IMIF on OMAP5910 and OCP-T1 on OMAP5912), the external
memory interface slow (EMIFS), and external memory interface fast (EMIFF).
If the traffic controller interface does not support bursting, the DMA controller
will perform four single accesses to move the burst of data. The peripheral port
does not support burst capability; therefore, the DMA controller will perform
four single peripheral port accesses to move the burst data. More information
on the traffic controller interfaces can be found in the OMAP5910 Dual-Core
Processor Memory Interface Traffic Controller Reference Guide (SPRU673)
and the OMAP5912 Multimedia Processor OMAP3.2 Subsystem Reference
Guide (SPRU749).
If bursting is used, the start addresses for the source and destination should
be aligned on a burst boundary. Burst boundaries correspond to byte
addresses with 0h as the least significant four bits.
To use bursting, the following conditions should be met:
The start address for the port with bursting enabled should be on a burst
-
boundary.
The element index should be 1.
-
The frame index should cause each burst access to align on a burst
-
boundary.
The result of the equation (Element number x Element size) should align
-
on a burst boundary. This means at the end of each frame, the address
should be aligned on a burst boundary.
If both the source and destination have bursting enabled, but the source
address does not start on a burst boundary, the source burst will be
automatically disabled internally. The source will load the channel FIFO and,
when enough data is available, a destination burst will be executed. If the
destination does not start on a burst boundary, the destination accesses will
be performed as single accesses.
If the frame size is not a multiple of 4 elements, the remaining 1 to 3 elements
at the end of the frame will be transferred in single (nonburst) accesses.
Burst mode is not supported when the source and destination are both
configured to be the EMIF port.
DSP DMA
DSP Subsystem 141