Power Management - Texas Instruments OMAP5910 Reference Manual

DSP Memory Management Unit
6.2.12

Power Management

6.3 Using the MPU to Manage the TLB
6.3.1 Architectural/Operational Description
96 DSP Subsystem
The clock to the DSP MMU can be shut off to save power. The GL_PDE bit of
the DSPMMU_IDLE_CTRL register can be set to completely shut off the clock
to the DSP MMU. Alternatively, the AUTOGATING_EN bit can be set such that
the clock to the DSP MMU is only shut off when DSP MMU is not active.
The DSP MMU generates a physical address for every virtual address
generated by the DSP external memory interface (EMIF) by using
address-translation information stored in its TLB. The DSP MMU includes
table walking logic, which automatically fetches the address-translation
information from a set of translation tables and updates the TLB. As an
alternative to using the table walking logic, the MPU core can be used to write
entries to the TLB. No translation tables are needed when using this approach.
Four major steps are taken when the DSP subsystem accesses DSP external
memory.
1) The DSP core or the DSP DMA requests an access to DSP external
memory.
2) The DSP EMIF receives that request and forwards it to the DSP MMU.
3) The MMU checks its TLB for a match on the virtual address tag. If there
is a TLB hit and the correct access permissions for the type of access (read
or write) are present, the MMU translates the virtual address from the
EMIF into a physical address and forwards the request to the traffic
controller with the appropriate endianess conversion. If the virtual address
tag is not found or if incorrect access permissions are present, the MMU
generates an interrupt to the MPU core and stalls the DSP EMIF until the
error is cleared. When the MPU core clears this error, the DSP MMU
repeats this entire step.
4) The traffic controller accesses the actual OMAP resource.
Figure 46 shows the major blocks involved during an access to DSP external
memory.
SPRU890A