Mmu Lsb Cam Entry Read Register (Read_Cam_L_Reg) Field Descriptions - Texas Instruments OMAP5910 Reference Manual

DSP Memory Management Unit
Table 40. MMU LSB CAM Entry Read Register (READ_CAM_L_REG) Field
Descriptions
Bits Field
31−16 Reserved
15−4 VA_TAG_L
3 PRESERVED
2 VALID
1−0 SLST
118 DSP Subsystem
Value Description
These bits are not used.
Least-significant bits of the virtual address tag. The VA_TAG bits
correspond to bits 23−10 of the DSP virtual address.
Preserve bit for the TLB entry. This bit specifies whether the TLB
entry should be kept during a TLB global flush.
0 TLB entry is not preserved during a TLB global flush.
1 TLB entry is preserved during a TLB global flush.
Valid bit for the TLB entry.
0 TLB entry is not valid.
1 TLB entry is valid.
Size of physical memory covered by the TLB entry.
00 TLB entry covers an entire section.
01 TLB entry covers a large page.
10 TLB entry covers a small page.
11 TLB entry covers a tiny page.
SPRU890A