6.2.3
Table Walking Logic
SPRU890A
bit in the Flush Entry Register (FLUSH_ENTRY_REG). The valid and
preserved bits of the TLB entry are cleared when the flush command is
completed.
To flush individual entries from the TLB, follow these steps:
1) Disable the table walking logic by clearing the TWL_EN bit in the Control
Register (CNTL_REG).
2) Select the TLB entry to be flushed by setting the victim pointer through the
Lock/Protect Entry Register (LOCK_REG). For example, to flush entry 0,
write 0 to the victim pointer field in the Lock/Protect Register.
3) Set the flush entry bit in the Flush Entry Register (FLUSH_ENTRY_REG).
4) Enable the table walking logic by setting the TWL_EN bit in the Control
Register (CNTL_REG). This step can be skipped if the table walking logic
is not being used.
When an address translation is not present in the TLB (a TLB miss), the table
walking logic automatically carries out the address translation using the
translation tables and then updates the TLB. Figure 34 is a flow diagram of the
steps taken by the table walking logic to translate a virtual address to a physical
address using the translation tables. Details on each step can be found in the
indicated sections.
DSP Memory Management Unit
DSP Subsystem
79