Physical Address Generation Using Tlb Entry With Size = 00B (Section) - Texas Instruments OMAP5910 Reference Manual

Multimedia processor dsp subsystem
Hide thumbs Also See for OMAP5910:
Table of Contents

Advertisement

DSP Memory Management Unit
Figure 29.

Physical Address Generation Using TLB Entry with Size = 00b (Section)

DSP virtual address
Physical address tag
31
Section base address
74
DSP Subsystem
3) Reads the corresponding physical address tag from the TLB entry.
4) Checks the access permission bits.
5) Generates a corresponding physical address by using the physical
address tag and the page index (taken from the virtual address).
The number of physical address tags and virtual address bits used in this
step depends on the size field of the TLB entry. Figure 29 through
Figure 32 illustrate how a physical address is generated from the physical
address tag and the page index.
If the access permission bits do not allow the type of access being requested,
the MMU generates a permission fault and interrupts the MPU core. An
interrupt is also generated if no matching virtual address tag is found and the
table walking logic is disabled (translation fault).
23
20
19
21
Section base address
20
19
Physical address
Page index
10
9
0 0 0 0 0 0 0 0 0 0
Page index
0
0
0
SPRU890A

Advertisement

Table of Contents
loading

This manual is also suitable for:

Omap5912

Table of Contents